# Cool Cap Engineer

## Controlling A Seven Segment Display Using Mojo

Remember a couple weeks ago when I said that I will be working on tutorials for the Mojo? Today’s post will be the first post that will be a Mojo tutorial. Although I originally planned to show you guys how to create a simple half adder with a 7 segment display, I realized we have to learn how to control the seven segment display first.  Today, I will show you not only how to connect your seven segment display to the Mojo, but how to implement a digital design to control the display on the Mojo.

# What Are Seven Segment Displays?

A seven segment display is just seven LEDs arranged to display a number ranging from 0-9.  However, seven segment displays have two different connections: common anode and common cathode.Seven segment displays with a common anode connection means that all of the LEDs have their anodes connected together.  However, seven segment displays with common cathode connection means all of the LEDs cathodes are connected to each other. The picture on the bottom shows common anode and common cathode seven segment displays.

When you have a common anode display, you just need one current limiting resistor, but 7 devices to sink the current for each LED. A common cathode display requires multiple current limiting resistors, but one ground connection to sink the current for all of the LEDs. For today’s tutorial, we will use a common cathode seven segment display.

# What Will You Need?

1) (1x) Mojo Board

2) (1x) LTS-4301JR 7 Segment Display

3) (7x) 330 ohm resistor

4) (1x) Micro USB cable

# Wiring Connection

The picture below shows how to connect the 7 segment display to the Mojo.

# How To Implement Your Digital Design Onto The Mojo?

For the next part, you’ll probably need to visit my getting started with FPGAs guide as alot of the steps from that tutorial can be applied for this one such as downloading the Xilnix Web ISE.

After downloading and extracting the Mojo project base, open Xilnix Web ISE. Once you open up the Xilnix ISE, go to file->open project. Navigate to your Mojo Project base and select the Xilnix ISE Project file inside the folder.

From the hierarchy menu in the Xilnix Web ISE, double click on the Mojo Top.v file, and edit it to look like this.

module mojo_top(
input clk,
input rst_n,
input cclk,
output[7:0]led,
output spi_miso,
input spi_ss,
input spi_mosi,
input spi_sck,
output [3:0] spi_channel,
input avr_tx,
output avr_rx,
input avr_rx_busy,
output [6:0] display
);

wire rst = ~rst_n;

assign spi_miso = 1'bz;
assign avr_rx = 1'bz;
assign spi_channel = 4'bzzzz;

assign led = 8'b0;
seven_segment_display_decoder(.clk(clk),.number(9),.seven_segment_display_control_lines(display));
endmodule


Don’t worry about line 24. We’re going to add the seven_segment_display_decoder module right now. Right click on Mojo Top.v and add a new verilog file. We’re going to call it “seven_segment_display_decoder.” After creating the file, add the following code to the file.

timescale 1ns / 1ps
module seven_segment_display_decoder(clk,number,seven_segment_display_control_lines);
input clk;
input [8:0] number;
output reg [6:0] seven_segment_display_control_lines;

always @ (posedge clk)
begin
case(number)
1:seven_segment_display_control_lines = 7'b0110000;
2:seven_segment_display_control_lines = 7'b1101101;
3:seven_segment_display_control_lines = 7'b1111001;
4:seven_segment_display_control_lines = 7'b0110011;
5:seven_segment_display_control_lines = 7'b1011011;
6:seven_segment_display_control_lines = 7'b1011111;
7:seven_segment_display_control_lines = 7'b1110000;
8:seven_segment_display_control_lines = 7'b1111111;
9:seven_segment_display_control_lines = 7'b1110011;
default:seven_segment_display_control_lines = 7'b1111110;
endcase
end
endmodule


Finally, select your mojo.ucf file. Edit it to make sure it look like this.

#Created by Constraints Editor (xc6slx9-tqg144-3) - 2012/11/05
NET "clk" TNM_NET = clk;
TIMESPEC TS_clk = PERIOD "clk" 50 MHz HIGH 50%;

NET "clk" LOC = P56;
NET "rst_n" LOC = P38;

NET "cclk" LOC = P70;

NET "led<0>" LOC = P134;
NET "led<1>" LOC = P133;
NET "led<2>" LOC = P132;
NET "led<3>" LOC = P131;
NET "led<4>" LOC = P127;
NET "led<5>" LOC = P126;
NET "led<6>" LOC = P124;
NET "led<7>" LOC = P123;

NET "spi_mosi" LOC = P44;
NET "spi_miso" LOC = P45;
NET "spi_ss" LOC = P48;
NET "spi_sck" LOC = P43;
NET "spi_channel<0>" LOC = P46;
NET "spi_channel<1>" LOC = P61;
NET "spi_channel<2>" LOC = P62;
NET "spi_channel<3>" LOC = P65;

NET "avr_tx" LOC = P55;
NET "avr_rx" LOC = P59;
NET "avr_rx_busy" LOC = P39;
NET "display<0>" LOC =P87;
NET "display<1>" LOC =P85;
NET "display<2>" LOC =P84;
NET "display<3>" LOC =P83;
NET "display<4>" LOC =P82;
NET "display<5>" LOC =P81;
NET "display<6>" LOC =P80;
`

So we finished all of the code for the Mojo. Now we need to create the bit file. Before we create the bit file, make sure you save everything. Once you save everything, select mojo_top.v. Underneath the hierarchy menu is the processes menu. Look for “Generate Programming File” in the Processes menu. Click on it. Xilnix will now try to create a bitfile aka your digital design.

Finally, select load file. When the bit file is uploaded to your Mojo, you should see a 9 on the seven segment display.

Well that’s it for today you guys! I’ll leave you to figure out how to change the number displayed on the display. If you guys have any more questions or concerns, then please leave a comment!

## Mojo Makes FPGA Board Design Open Source

Last January, I’ve been learning how to use FPGAs, which I talked about in my Getting Started With FPGAs post.  To learn how to use FPGAs, I brought FPGA development boards, which can cost up to $110, from Digilent.com. Fast forward to March, and I found Mojo, an open source$75 FPGA development board, on Kickstarter.com. Based on what I’ve seen and tested thus far, I honestly think the Mojo board is a great introduction to digital design for electronic hobbyists and electrical engineering students.

What’s Under The Hood?
Unlike the Basys 2 that I commonly use, the Mojo uses a Spartan 6 XC6SLX9 FPGA. The Spartan 6 uses a 50MHZ clock, which is 10MHZ higher than the maximum clock frequency that a PIC18F can run.  In layman terms, it can run faster than most of my microcontroller/FPGA boards. The board can accept between 5V-12V, but can only output 3.3V for each digital I/O pin. Because of the Mojo’s 3.3V limitation, you’ll need extra hardware to use electronic items like servos, solenoids, etc. Finally, the Mojo uses an Atmega16U4 for the USB connection among other things.

What’s So Special About The Mojo?

The Mojo board is geared towards making digital design easy for hobbyists and electrical engineering students by taking advantage of the board’s Atmega16U4 microcontroller, which is used to implement your digital designs on to the board. However, the Atmega16U4 is not just used for uploading your designs to the Mojo. The Atmega16U4 is used to communicate serial objects like serial LCDs, XBee wireless modules, and even Sparkfun’s FTDI breakout boards, with the Mojo.  You can even use the analog to digital converters included with the Atmega16U4 to allow the Mojo to take in analog signals.

What I Love About The Mojo ?

Although this seems like a petty thing, one of the key qualities I look for in a FPGA development board these days is the number of accessible I/O pins.  When I first heard that the Mojo will offer 84 accessible I/O lines, I immediately gave my pledge for the project  In fact, the lack of accessible pins for the Basys 2 FPGA board severely limited me in terms of FPGA projects. Embedded Micro even added 8 LEDs on the board for FPGA beginners to use. These LEDs are prefect for beginners as they implement simple modules using these LEDs. During the early stages of testing the board, not only did I create a blinking module for one LED, but I also used the same module to control the other seven LEDs on the board.

Despite the sheer number of I/O pins available, one cannot forget the fact that the Mojo is open hardware, which simply means that the Mojo’s schematic is available to view. This is crucial if you want to create your own FPGA development board, but do not know where to start. In fact, I will probably use the Mojo’s schematic in the future.

Work Done Thus Far ?

Currently, I do not have any project plans for the Mojo board. My focus has been learning how to effectively use the Mojo board. Recently, I learned how to control a servo using the Mojo board, even though most servos can only powered using 5V. I was able to control the servo by connecting one of the Mojo’s pins to the optoisolator’s input pin, and the servo’s signal pin to the optoisolator’s Vo pin. Although I could not find a power supply around, I used my Arduino board to provide the right power to the servo.

Where Can I Learn How To Use The Mojo Board?

Although I am planning to write tutorials on how to use the Mojo board for this blog, you can visit Embeddedmicro.com, where you can read tutorials on how to implement serial communication, servo control, and other digital modules onto the Mojo. If you want to purchase your own Mojo board, then visit this URL. Please keep in mind that the Mojo board only cost \$75.

## Tutorials: Getting Started With FPGAs

So today, I thought I would talk about something other than microcontrollers. Today, I will talk about how to get started with FPGAs.

# What is a FPGA?

An FPGA is a field programmable gate array. Instead of programming a FPGA  like your standard microcontroller, you actually “implement” digital circuits using a hardware description language (HDL). The two common hardware description languages includes VHDL and Verilog. For today’s tutorial, we’ll implement our design using Verilog.

# FPGA vs Microcontrollers

So what are the advantages of using a FPGA rather than a microcontroller?  The problem with microcontrollers is that they cannot run co-currently, or only run sequentially, and very time limited. A FPGA runs in parallel, or able to run multiple things at once, and much faster than microcontrollers.  However, FPGAs are very space limited and initially does not come with all of the fancy peripherals that microcontrollers have. Things like timers, UART, and SPI must be implemented by hand on the FPGA. Also, to have your design stay with the FPGA,  you have to use a re-programmable flash memory IC.

# Parts List

To get started, you need only the following items

Hardware

Software

# Installing Xilinx Web ISE

• To learn how to install the Xilinx Web ISE, I highly recommend visiting this URL .They have all the necessary information on properly installing the ISE.

• To program the Basys 2 board, you need to download Adept from Digilent’s website. Just follow the on screen prompts for proper installation.

# Starting A Project

• To create a new project, go to file->new project
• At the create project screen, select a name and location for the project. For this example, let’s name the project “First_Project” and set the location to any location on your computer. Make sure you select “HDL” as your Top-level source type.
• For project settings, make sure you have the following set…
1. Family is set to Spartan3E
2. Device is XC3S100E
3. Package is CP132
4. Speed is ~4
5. Synthesis Tool is XST (VHDL/Verilog)
6. Simulator is ISim (VHDL/Verilog)
7. Preferred Language is Verilog

• At Project Summary, select Finish.

# Creating Verilog Module

• At the project menu, you should see x3s100e-4cp132. Right click on this and select “New Source”
• At the new source menu, select Verilog module and set the name to blink.
• When prompted at the define module, just click next. We’ll define the inputs and outputs later on. Afterwards select finish.
• In your blink.v file, copy and paste the following code into the file.
• Make sure to hit save.

# Creating UCF File

Although we created the module, the FPGA does not know which pins on it should be connected to the module’s inputs and outputs. This is where the UCF file comes in.

• Right click you blink.v file and select “New Source”
• In your new source menu, select ” Implementation Constraints File.” We’ll name this file “blink”. Don’t worry, this will not replace the blink.v file.

• Hit next and select finish
• Make sure to hit save.

# Creating Bit File

Okay, so we’re almost ready to program- I mean ” implement”- our digital design on the FPGA. FPGAs are usually programmed using a bit file. We’re going to create a bit file using the Web ISE.

• Your should see ” Generate Programming File” in the Processes menu. Click on it.

• Wait for a little bit for the ISE to finish creating the bit file.

# Checking Connections

It is very important to check to see if the FPGA really routed the inputs and outputs correctly. To do this…

• In the Processes menu, select ” Design Summary/Reports”
• In Design Overview click on ” Pinout Report”
• Check to see if “clk_in” is connected to B8 and “out” is connected to M5.

• As shown above, the ISE did not correctly route the connections. This can be solved by resaving your UCF file and clicking the “Generate Programming File” option again.

We’re at the final part of the tutorial!

• Connect the Basys 2 to your computer and turn on it on.

• You can upload the bit file to the main FPGA or the board’s re-programmable flash memory. Since we want the board to remember the bit file whenever we turn on or off the board, we’ll program the bit file to the reprogrammable flash (PROM)
• Click browse button next to the PROM option
• Navigate to your project folder.  The bit file should be inside the folder.
• Hit “program” next to browse
• After the bit file is uploaded to the board, turn off then turn on your board. You should see  LD0 blink every 500ms.

# How does it work?

First thing, we need to use the 50MHZ clock on the board to tell the FPGA when 500ms has occurred. But how? Well, frequency is really counts per second. Using unit conversion and an onboard counter , we can find how many counts it takes for 500ms to occur.

$\frac{50,000,000}{seconds}*500ms=25,000,000$

Now that we know the counts, how do we use it in our design? We can use a register, a variable inside verilog, to function as our counter.  During the positive edge of the clock, we tell the design to increment the counter by 1. When counts reaches 25 million, the design resets the counter to 0 then invert the output of the LED, which is initially set to off.