Cool Cap Engineer

Engineering by an anime nerd

Controlling A Seven Segment Display Using Mojo

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Remember a couple weeks ago when I said that I will be working on tutorials for the Mojo? Today’s post will be the first post that will be a Mojo tutorial. Although I originally planned to show you guys how to create a simple half adder with a 7 segment display, I realized we have to learn how to control the seven segment display first.  Today, I will show you not only how to connect your seven segment display to the Mojo, but how to implement a digital design to control the display on the Mojo.

What Are Seven Segment Displays?

LSHD-5503

A seven segment display is just seven LEDs arranged to display a number ranging from 0-9.  However, seven segment displays have two different connections: common anode and common cathode.Seven segment displays with a common anode connection means that all of the LEDs have their anodes connected together.  However, seven segment displays with common cathode connection means all of the LEDs cathodes are connected to each other. The picture on the bottom shows common anode and common cathode seven segment displays.

7segmentdisplay
When you have a common anode display, you just need one current limiting resistor, but 7 devices to sink the current for each LED. A common cathode display requires multiple current limiting resistors, but one ground connection to sink the current for all of the LEDs. For today’s tutorial, we will use a common cathode seven segment display.

What Will You Need?

1) (1x) Mojo Board

2) (1x) LTS-4301JR 7 Segment Display

3) (7x) 330 ohm resistor

4) (1x) Micro USB cable

Wiring Connection

The picture below shows how to connect the 7 segment display to the Mojo.

mojopic

How To Implement Your Digital Design Onto The Mojo?

For the next part, you’ll probably need to visit my getting started with FPGAs guide as alot of the steps from that tutorial can be applied for this one such as downloading the Xilnix Web ISE.
Afterwards, you’ll need to download the Mojo project base.

After downloading and extracting the Mojo project base, open Xilnix Web ISE. Once you open up the Xilnix ISE, go to file->open project. Navigate to your Mojo Project base and select the Xilnix ISE Project file inside the folder.
mojoproject

From the hierarchy menu in the Xilnix Web ISE, double click on the Mojo Top.v file, and edit it to look like this.

module mojo_top(
    input clk,
    input rst_n,
    input cclk,
    output[7:0]led,
    output spi_miso,
    input spi_ss,
    input spi_mosi,
    input spi_sck,
    output [3:0] spi_channel,
    input avr_tx,
    output avr_rx,
    input avr_rx_busy,
	 output [6:0] display
    );

wire rst = ~rst_n;

assign spi_miso = 1'bz;
assign avr_rx = 1'bz;
assign spi_channel = 4'bzzzz;
	 
assign led = 8'b0;
seven_segment_display_decoder(.clk(clk),.number(9),.seven_segment_display_control_lines(display));
endmodule

Don’t worry about line 24. We’re going to add the seven_segment_display_decoder module right now. Right click on Mojo Top.v and add a new verilog file. We’re going to call it “seven_segment_display_decoder.” After creating the file, add the following code to the file.

`timescale 1ns / 1ps
module seven_segment_display_decoder(clk,number,seven_segment_display_control_lines);
input clk;
input [8:0] number;
output reg [6:0] seven_segment_display_control_lines;

always @ (posedge clk)
begin
	case(number)
	1:seven_segment_display_control_lines = 7'b0110000;
	2:seven_segment_display_control_lines = 7'b1101101;
	3:seven_segment_display_control_lines = 7'b1111001;
	4:seven_segment_display_control_lines = 7'b0110011;
	5:seven_segment_display_control_lines = 7'b1011011;
	6:seven_segment_display_control_lines = 7'b1011111;
	7:seven_segment_display_control_lines = 7'b1110000;
	8:seven_segment_display_control_lines = 7'b1111111;
	9:seven_segment_display_control_lines = 7'b1110011;
	default:seven_segment_display_control_lines = 7'b1111110;	
	endcase
end
endmodule

Finally, select your mojo.ucf file. Edit it to make sure it look like this.

#Created by Constraints Editor (xc6slx9-tqg144-3) - 2012/11/05
NET "clk" TNM_NET = clk;
TIMESPEC TS_clk = PERIOD "clk" 50 MHz HIGH 50%;

# PlanAhead Generated physical constraints 
NET "clk" LOC = P56;
NET "rst_n" LOC = P38;

NET "cclk" LOC = P70;

NET "led<0>" LOC = P134;
NET "led<1>" LOC = P133;
NET "led<2>" LOC = P132;
NET "led<3>" LOC = P131;
NET "led<4>" LOC = P127;
NET "led<5>" LOC = P126;
NET "led<6>" LOC = P124;
NET "led<7>" LOC = P123;

NET "spi_mosi" LOC = P44;
NET "spi_miso" LOC = P45;
NET "spi_ss" LOC = P48;
NET "spi_sck" LOC = P43;
NET "spi_channel<0>" LOC = P46;
NET "spi_channel<1>" LOC = P61;
NET "spi_channel<2>" LOC = P62;
NET "spi_channel<3>" LOC = P65;

NET "avr_tx" LOC = P55;
NET "avr_rx" LOC = P59;
NET "avr_rx_busy" LOC = P39;
NET "display<0>" LOC =P87;
NET "display<1>" LOC =P85;
NET "display<2>" LOC =P84;
NET "display<3>" LOC =P83;
NET "display<4>" LOC =P82;
NET "display<5>" LOC =P81;
NET "display<6>" LOC =P80;

So we finished all of the code for the Mojo. Now we need to create the bit file. Before we create the bit file, make sure you save everything. Once you save everything, select mojo_top.v. Underneath the hierarchy menu is the processes menu. Look for “Generate Programming File” in the Processes menu. Click on it. Xilnix will now try to create a bitfile aka your digital design.

mojofpga1

Now we need to burn the bitfile onto the Mojo board. If you have not done so, download the Mojo Loader. Once your download and extract the mojo loader and configure your computer to recognize the Mojo, open the application file inside the Mojo Loader folder. From the Mojo Loader select “Open Bin File.” Navigate to your Mojo Project Base and then to Mojo-Base->syn. Select the mojo_top.bit file.
mojofpga2

Finally, select load file. When the bit file is uploaded to your Mojo, you should see a 9 on the seven segment display.

Well that’s it for today you guys! I’ll leave you to figure out how to change the number displayed on the display. If you guys have any more questions or concerns, then please leave a comment!

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