# Projects: Single Level Inverter Implementation #1

So a couple months ago, I did an REU power electronics experience at University of Tennessee at Knoxville. Despite the initial frustration, the experience was worthwhile and made me realize the importance of power electronics in today’s industry. I spent most of the research at the REU program running ideal simulations of a seven level cascaded that’s powered by a PV module for each level.  While participating in the research, I learned various parameters that must be taken in account when implementing a real multilevel inverter.  After participating in the program, I went to work on designing the circuitry, PCB, and selecting the parts for my own multi-level inverter.

So how does a multilevel cascaded inverter work? First, let me explain how a single inverter level works. A single level of an inverter consists of 4 switches and a DC source connected between them.  A single inverter level must be able to generate 3 different switching states: 0 volts( when only the top two switches turn on), VDC (when the top left and bottom right switches turn on), and -VDC (when just top right and bottom left switches turn on).

Now, let say we connect another inverter level to the original level, but the switching sequence is out of phase of the original. By connecting out of phase inverter levels, you’ll get a stair case waveform, where the number of stairs is just two times the number of inverter levels added by one. By adding an infinite amount of out of phase inverter levels in series with each other, you’ll get a perfect sinusoidal waveform. The easiest way to understand this is to think of the multilevel inverter as those baby stacking toys you use to play with. Figure 1 shows an example of a S level inverter and figure 2 shows the waveform associated with the multilevel inverter.

Figure 1: Multilevel Cascaded Inverter example

Figure 2: Multilevel Inverter Waveforms (n level)

The goal is to successfully implement a single level of the inverter. Not only am I doing this for sheer curiosity, but it can be use for my microcontroller class I will be taking this fall. By implementing the single level correctly, the multi-level inverter can be implemented later. So, there were a couple things I had to take in account when selecting the parts for a single level of a inverter.

Transistor Blocking Voltage:  The blocking voltage has different terminologies for different transistors. For example, the VDS rating is the blocking voltage of the mosfet, while the VCE rating of a BJT is also the blocking voltage. The blocking voltage must be 150% higher than the peak voltage of the inverter. The 150% may seem excessive, but I want to make sure your transistor will not burn out due to the peak voltage of the inverter.

Transistor Current Rating: Since my project will use mosfets, we want to make sure the drain current rating of the mosfet is much higher than the possible peak output current of the inverter. Like the blocking voltage rating, you want to choose a current rating 150% higher than the expected output current of the inverter.

Gate Driver: Let’s get one this straight; transistors are not ideal switches. Transistors have a lot of imperfections and limitations that makes everything I learned from my ideal seven level cascaded inverter simulations absolutely useless.  Among them, transistors cannot instantaneously turn on or off due to the limited rise and fall times associated with them.  The rise and fall times for a mosfet can be further reduced by adding a gate driver to the gate of the mosfet. The gate driver will allow a bigger current to go through the gate of the mosfet, allowing a faster charge time for the mosfet’s gate capacitance.  By increasing the charge time of the mosfet’s gate capacitance, you achieve a faster rise time for the mosfet. Of course, the gate driver has its own rise/fall time as well.

Although I did not select the parts yet, I managed to design the circuitry and the PCB associated with the inverter with Eagle Cad since the parts will keep the same format for the most part. I’ll update you guys on any further progress I make with this project.If you worked on multilevel inverters, and you have a complement, or compliant, let me know by posting a comment! Thank you and have a great day!

Figure 3: Single Level Inverter Schematic

Figure 4: Single Level Inverter PCB Design